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ECEN 5593 - Advanced Computer Architecture

Catalog Data ECEN 5593 (3). Advanced Computer Architecture (cross-listed with) CSCI 5593 - Advanced Computer Architecture . Provides a broad-scope treatment of important concepts in the design and implementation of high-performance computer systems. Discusses important issues in the pipelining of a processor, out-of-order instruction issue and superscalar designs, design of cache memory systems for such systems, and architectural features required for multicore processor designs. Also studies current and historically important computer architectures.
Credits and Design 3 credit hours. Elective course.
Prerequisite(s) ECEN 4593, Computer Organization
Textbook Hennessy and Patterson, Computer Architecture: A Quantitative Approach , Morgan Kaufmann, 2003.
Course Objectives To introduce the student to advanced architectural techniques for the design of large computer systems. To teach the breadth of possibilities for influencing and improving various performance parameters of computer systems. Discusses important issues in system design, microarchitecture, cache memory design, compilers, and operating systems. Studies include current and historically important computer architectures, and students gain skillful experience in modeling modern systems and using state-of-the-art performance analysis tools.
Topics Covered
  1. Introduction and historical survey.
  2. General design principles.
  3. Issues in pipelining -- timing and skew, treatment of hazards.
  4. Characterizing cost and performance.
  5. Instruction-level parallelism.
  6. Thread-level parallelism.
  7. Branching (branch prediction) and interrupts in pipelined machines.
  8. Cache memories (design issues) and prefetching.
  9. Case studies: the CDC 6600 and the Scoreboard; the IBM 360/91 and Tomasulo's algorithm; Intel Pentium-4, Intel/HP Itanium, Hyperthreading;
  10. Architecture paradigms: superscalar (out of order) machines; VLIW machines, EPIC machine, SMT architectures.
  11. Compiler optimization techniques (loop unrolling, software pipelining).
  12. Power-aware computing.
  13. Embedded processor design.

Last revised: 08-02-11, PM, ARP.