Chapter 7: Glossary

Name

Body Effect

The variation of the threshold voltage of an FET due to a variation of the substrate or bulk voltage. See also Body Effect

Channel implant

Ion implantation in the channel region used to adjust the threshold voltage of a MOSFET.

Channel length modulation

Variation of the channel due to an increase of the depletion region when increasing the drain voltage. A reduction of the channel yields a higher current.

CMOS

Complementary metal oxide silicon (transistor)

Depletion mode FET

Transistor, which is normally on if the gate is connected to the source

DIBL

Drain induced barrier lowering

Drain

Contact region of a MOSFET to which the electrons in the channel flow

DRAM

Dynamic random access memory

EAPROM

Electrically alterable programmable read only memory

EEPROM

Erasable electrically programmable read only memory

Enhancement FET

Transistor, which is normally off if the gate is connected to the source.

EPROM

Electrically programmable read only memory

FAMOS

Floating gate Avalanche injection Metal Oxide Silicon (transistor)

FET

Field Effect Transistor

Gate

Electrode of an FET, which controls the charge in the channel

Latchup

High current state of a CMOS circuit caused by the parasitic bipolar transistors

LDD structure

Low doped drain transistor structure

LOCOS

Local oxidation used to isolate two adjacent devices.

MOSFET

Metal-Oxide-Semiconductor Field Effect Transistor. See also MOSFET

Overlap capacitance

Capacitance between the gate and the source/drain due to the overlap between the gate and the source/drain regions.

Punch through

Breakdown mechanism caused by the overlap between the source and drain depletion regions

RAM

Random access memory

Source

Contact region of a MOSFET from which the electrons in the channel originate

Subthreshold current

Transistor current when biased below threshold

Threshold Voltage

The gate-source voltage at which a transistor starts to conduct.

Variable Depletion Layer Model

A MOSFET model which includes the variable depletion layer width between the inversion layer and the substrate

Well

Doped region of opposite doping type used in a CMOS process