Review Questions

Exam #2 Wednesday Oct 29, 1997

1. Repeat HW #11, problems 1 and 3 at T = 100°C.
2. For the diode of HW 12 problem 2, calculate the net doping density and sketch the charge density as a function of position throughout the diode.
3. Calculate the conductivity and resistivity of intrinsic silicon. Use n_i = 10¹⁰ cm^-3, m_n = 1400 cm²/V-sec and m_p = 450 cm²/V-sec. (r = 337.4 kOhm cm)
4. Consider the problem of finding the doping density which results the maximum possible resistivity of silicon at room temperature. (n_i = 10¹⁰ cm^-3, m_n = 1400 cm²/V-sec and m_p = 450 cm²/V-sec.)
   a) Should the silicon be doped at all or do you expect the maximum resistivity when dopants are added? (yes)
   b) If the silicon should be doped, should it be doped with acceptors or donors (assume that all dopant are shallow). (acceptors)
   c) Calculate the maximum resistivity, the corresponding electron and hole density and the doping density. (r = 393 kOhm cm, n = 5.67 x 10⁹ cm^-3 and p = 1.76 x 10¹⁰ cm^-3)
5. The electron density in silicon at room temperature is twice the intrinsic density. Calculate the hole density, the donor density and the Fermi energy relative to the intrinsic energy. Repeat for n = 5 n_i and n = 10 n_i. Also repeat for p = 2 n_i, p = 5 n_i and p = 10 n_i, calculating the electron and acceptor density as well as the Fermi energy relative to the intrinsic energy level. (n = 2ni, 5ni, 10ni, p=ni/2, ni/5, ni/10, Nd-Na=1.5 ni, 4.8 ni and 9.9 ni)
6. Consider a symmetric silicon p-n diode (N_a = N_d)
   a) Calculate the built-in potential if N_a = 10¹³, 10¹⁵ and 10¹⁷ cm^-3. Also calculate the doping densities corresponding to a built-in potential of 0.7 V.
   b) For the same as in part a), calculate the total depletion layer widths, the capacitance per unit area and the maximum electric field in thermal equilibrium.
   c) Repeat part a) and b) with N_a = 3 N_d.
7. A one-sided silicon diode has a breakdown voltage of 1000 V for which the maximum electric field at breakdown is 100 kV/cm. What is the maximum possible doping density in the low doped region, the built-in potential, the depletion layer width and the capacitance per unit area? Assume that bulk potential of the highly doped region is Eg/2 (0.56 V). (Nlow = 3.3e13, Vbi=0.77 V, C = 52.6 pF/cm2)
8. For the capacitor of HW 18 problem 3, find the surface charge density Q_ss.
9. An MOS capacitor with an oxide thickness of 20 nm has an oxide capacitance which is three times larger than the minimum high-frequency capacitance in inversion. Find the substrate doping density. (w = 0.177 micron, Na (or Nd) = 3E16 cm-3)
10. A CMOS gate requires n-type and p-type MOS capacitors with a threshold voltage of 2 and -2 Volt respectively. If the gate oxide is 50 nm what are the required substrate doping densities? Assume the gate electrode is aluminum. (Na = 8.5E16 cm-3, Nd = 2E16 cm-3) Repeat for a p⁺ poly-silicon gate. (Na = 2.5E16 cm-3, Nd = 8E16 cm-3)
11. Consider a p-MOS capacitor (with an n-type substrate) and with an aluminum gate. Find the doping density for which the threshold voltage is 3 times larger than the flat band voltage. tox = 25 nm. (Nd = 6.2E14 cm-3) Repeat for a capacitor with 10¹¹ cm^-2 electronic charges at the oxide-semiconductor interface. (Nd = 2.5E15 cm-3)