Assignment

Due date

Description

Homework #1
Solution

Sept. 2

M&K Problem 1.1, 1.2, 1.3 and 1.4 p 45

Use Appendix 2 for physical constants in addition to Table 1.3 and 1.4 p 52-54.
Note that answers to selected problems can be found on p 517-518

Homework #2
Solution

Sept. 9

M&K Problem 1.8, 1.10, 1.12, 1.18

Homework #3
Solution

Sept. 16

HW3 assignment

Homework #4
Solution

Sept. 23

HW4 assignment

Homework #5
Solution

Sept. 30

M&K Problem 3.7, 4.1, 4.3

Homework #6
Solution

Oct. 7

M&K Problem 4.5, 4.6, 4.9

Homework #7
Solution

Oct. 31

1. Derive the ideal p-n diode current without assuming the quasi-neutral regions to be short or long. Write the result in terms of hyperbolic functions.
2. M&K 5.2
3. M&K 5.9
4. M&K 5.11
5. Download SimWindows and run the p-n diode example at a bias voltage of 0.6 V. Plot the energy band diagram and the carrier density (on a log scale) throughout the whole structure.

Homework #8
Solution

Nov. 4

1. 1 cm² solar cell consists of a p-type region containing 10¹⁸ cm^-3 acceptors and an n-type region containing 10¹⁵ cm^-3 donors. w_p^' = 0.1 mm and w_n >> L_p. Use m_n = 1000 cm²/V-s and m_p = 300 cm²/V-s. . The minority carrier lifetime is 10 ms . The diode is illuminated with sun light, yielding a photocurrent density of 30 mA/cm².
1. Calculate the open circuit voltage and short-circuit current of the solar cell.
2. Calculate the maximum power generated by the cell and the corresponding voltage and current.
3. Calculate the fill factor of the solar cell.
4. Calculate the fill factor for the same cell when it is illuminated by a concentrator so that the photocurrent density equals 300 A/cm².
2. Use SimWindows to calculate the current of the diode described in problem 1 (without light) at 0.1, 0.2, 0.3, 0.4, 0.5, 0.6 and 0.7 Volt. Plot the current on a semi-logarithmic scale and extract the saturation current as well as the ideality factor of the diode.
   Calculate the ideal diode current an plot the result on the same graph. Discuss the agreement or lack thereof between the simulation and the ideal diode current.

Homework #9
Solution

Nov. 11

1. Consider an NPN silicon bipolar junction transistor with N_E = 10¹⁸ cm^-3, N_B = 10¹⁷ cm^-3, N_C = 10¹⁵ cm^-3, w_E = 1mm, w_B = 0.5 mm and w_C = 4 mm. The minority carrier lifetimes equal 1 ms throughout the transistor. V_BE = 0.5 V and V_BC = 0 V. Ignore the recombination in the depletion region. The base-emitter junction area equals 10^-4 cm².
   1. Calculate the quasi-neutral region widths in all three regions.
   2. Calculate the emitter efficiency, the base transport factor and the current gain, using the ideal device model.
   3. Calculate the base-emitter and base-collector junction capacitances.
   4. Calculate the majority carrier charge and the excess minority carrier charge in the quasi-neutral region in the base.
   5. Calculate the base transit time, t_r.
   6. Calculate the ideality factor, n, of the collector current, I_C , and calculate the Early voltage, V_A.
2. Derive an expression for the base transit time without assuming the quasi-neutral base region to be either much longer or much shorter than the diffusion length. Write your answer as a function of the quasi-neutral base width, w_B^’, and the electron diffusion constant and diffusion length in the base, D_n,B and L_n,B.
   Start from the time independent diffusion equation and apply both boundary conditions to find the electron density in the base. Calculate the diffusion current at both ends of the quasi-neutral region. Find the base transport from the ratio of both currents. Use hyperbolic functions, cosh(x) and sinh(x), to simplify the derivation.

Homework #10
Solution

Nov. 18

M&K Problems 8.3, 8.4*, 8.12
* Plot the exact low frequency capacitance using section 6.5.5 of the on-line text for the exact MOS analysis.

Homework #11
Solution

Dec. 2

1. Muller & Kamins, Problems 9.3, 9.10, 9.15

Consider an n-type Metal Oxide Silicon Field Effect Transistor with gate length, L, and an aluminum gate metal. The transistor is biased in saturation with V_DS = V_GS - V_T, and the substrate is connected to the source (V_S = V_B). There is no charge in the oxide nor is there any charge at the interface due to surface states.

1. Derive an expression for the channel voltage, V_C(y), versus the position, y, in the channel between source and drain. Use the quadratic model. DON'T use the variable depletion layer model!
   Hint: treat the section of a transistor between the source at y = 0 and the location y as a transistor with gate length y.
2. Derive an expression for the depletion layer width, x_d(y), between the inversion layer and the substrate.
3. Calculate the depletion layer width using your solution obtained in b) at y = 0, 0.2, 0.4, 0.6, 0.8 and 1 mm. Use the following parameters: N_a = 10¹⁷ cm^-3, L = 1 mm, t_ox = 20 nm and V_GS = 5 V.