ECEN 2350 - Digital Logic
Alex Fosdick, Spring 2016
Course Description and Requirements
A downloadable copy of the course syllabus and website information is here:
- Class: MWF 11:00-11:50 am, Fleming 104
- Instructor: Professor Alex Fosdick,
ECOT 435, Fax: 303-492-2758, e-mail: fosdick[at]colorado[dot]edu (replace [at] with @ and [dot] with .)
- Office Hours: W 10-11am, R 10-11am, and by appointment.
- Study Hour: Thursday 6-8pm, ECCR 200.
- Text: Stephen Brown and Zvonko Vranesic,
Fundamentals of Digital Logic with Verilog Design, 3rd Edition,
McGraw-Hill, 2014, ISBN-13 978-0-07-338054-4.
- Prerequisite: ECEN 1030, C Programming for EE/ECE, or CSCI 1300,
Computer Science 1: Programming.
- Credit Hours: 3
- Course Description: Covers the design and application of
digital logic circuits, including combinational and sequential logic
- Course Objectives: Course objectives are
the long-term goals set for students who take this course.
For students to:
- Understand how logic circuits are used to solve engineering
- Understand how logic circuits are analyzed, designed, verified,
- Understand the relationship between abstract logic
characterizations and practical electrical implementations.
- Learning Outcomes: Learning outcomes are
the skills and abilities students are expected to have at the end of
the course so that the course objectives can be achieved. Learning
outcomes also define the primary quantities that are measured for the
purpose of course assessment and continuous improvement.
After taking this course students will be able to recognize and use
the following concepts, ideas, and/or tools:
- Logic level models, including Boolean algebra, finite
state machines, arithmetic circuits, and hardware description
- Logic gates, memory, including CMOS gates, flip-flops,
arrays, and programmable logic.
- Design tools, both manual and computerized, for design,
optimization, and test of logic circuits.
- Design criteria, including area, speed, power consumption,
- Topics Covered:
- Boolean algebra
- Logic gates and networks
- Verilog HDL (hardware description language)
- Combinational logic circuit synthesis and optimization
- Number representation and arithmetic circuits
- CMOS technology and programmable logic devices
- Flip-flops, registers, and counters
- Finite state machines
- Synchronous sequential circuits
- Digital system design
- Asynchronous sequential circuits
- Testing and testability of logic circuits
- Course Requirements:
- Attend class
- Clicker questions (~10%)
- Homework (~10%): Weekly, due on Mondays
- Projects (~20%): Three projects that involve
design, simulation, and implementation of a digital circuit
or system using Verilog and the DE0 board.
- Quizzes (4 x ~10%): Four quizzes, closed book, closed
notes. Dates: 2/5, 2/26, 3/18, 4/15.
- Final exam (~20%): Thu. May 2, 1:30 pm - 4:00 pm,
Final Exam Schedule. Closed book, closed notes
- Hardware/Software Requirements: We will use the (free
version of the) Altera ModelSim software for Verilog simulations
and the (free version of the) Altera Quartus II software for the
design and implementation of digital logic circuits and systems.
The hardware that we will use is the DE0 board manufactured
by Terasic. The board can be purchased in the E-store. The same
board is used for ECEN 2350 and ECEN 3350.
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Last revised: 1-10-16, AF.