ECEN 4573 – Spring Semester 2004 – Thursdays 8:00-11:50 AM
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Course Schedule
Date Activity
January 15 Orientation, goals, policy. Discuss laboratory systems. Discuss organization and possible projects. Access keys. Form groups.
January 22 Discuss technology. ROMs, EPLDs, Xilinx, others. Presentations for Motorola and Xilinx families.
January 29

Preliminary Design Review. The PDR will be a presentation to the class of type of project to be undertaken. The primary goal is to convince the audience that the project is feasible and roughly comparable to the others in complexity. The presentation is expected to be formal, professional, and rehearsed. All members of the team are expected to take an active role in the presentation.

The Preliminary Design Review will include a hard copy of the presentation material for the instructors' use. A preliminary version of the User's Manual is required.

February 5 Additional technologies available; construction realities. PDR post mortem. The students' and instructors' critiques of the PDR will be discussed with each group.
February 12

Documentation: Criteria and Tools
Weekly Progress Reports: Every Wednesday beginning February 11, a half-page progress report from each student will be mailed to the instructor on the email system by 5:00 p.m. The reports should list what the student was supposed to have done that week, what was actually accomplished, the reason for any discrepancies, any potential delays, and any design modifications. Note: the report "the construction went on as scheduled, and no delays are expected" is NOT an acceptable report. These weekly progress reports should continue until the end of the semester.

February 19 Critical Design Review. This is the second of the design reviews; like the first it should be rehearsed, professional, and illuminating. The design must be complete at this point, with circuit diagrams complete with pin-outs. Be sure to include readable timing diagrams. List signal names, show logic diagrams, and carefully define interfaces. Initial parts lists are due.
February 26 Serial communication, download, boot monitor, code generation.
March 4 Hardware/software Analysis and Debug Tools: state, timing, emulation, simulation, etc. CDR post mortem.
March 11 TBA
March 18 First Milestone
March 25 TBA
April 1 Second Milestone
April 8 TBA
April 15 TBA
April 22 TBA
April 29 Computer Expo: donuts, coffee, juice, etc. The machines will be graded at their status at the Expo. By the end of the Expo, you must have scheduled a checkout time with the TA and an exit interview time with the instructors. All documentation is due by the end of the Expo.