Analog IC Design
ECEN 4827/5827 -- Fall 2017
Prof. Hanh-Phuc Le
Class: MWF, 3:00PM - 3:50PM, ECCS 1B14
Office hour: Mon,Wed 5PM-6PM @ ECOT 340

Assignments


    • Homework Set 12: due 10:00AM Thursday 12/14
      Objectives: Frequency response, stability and compensation
      • 1. [30 pts] Problem D7: feedback circuits with a single-pole compensated op-amp
      • 2. [40 pts] Problem S6: compensation of an op-amp in the class 0.35u CMOS process. Reference: problem S8 from HW set 6. Include your simulation file and your pdf file which must show work your and demonstrate all requested satisfactory specifications.
      • 3. [30 pts] Problem S.6.zero: RHP zero cancellation

    • Homework Set 11: due 2:00PM Saturday 12/06
      Objectives: Dominant pole compensation
      • 1. [45 pts] Problem DP.Op-amp: Dominant pole Op-amp
      • 2. [55 pts] Problem S.11 Wide-bandwidth amplifier design. Problem S.10 was in HW9. In addition to the pdf file, upload your LTspice files; extra-credit is available. To receive credit for Problem S11, make sure that subcircuit models (prefix X) are used for NMOS and PMOS devices in LTspice simulations.

    • Homework Set 10: due 11:59PM Tuesday 12/02
      Objectives: Frequency response with ZVTC method
      • 1. [15 pts] Problem B.4: ZVTC method.
      • 2. [15 pts] Problem B.7: ZVTC method.
      • 3. [15 pts] Problem B.7 NEET method.
      • 3. [15 pts] Problem B.8 ZVTC method.
      • 4. [20 pts] Problem B.8 NEET method..
      • 6. [20 pts] Problem S10. Active-loaded CS amplifier: design and simulation; in addition to the pdf file, upload your LTspice files. To get credit for Problem S10, make sure that subcircuit models (prefix X) are used for NMOS and PMOS devices in LTspice simulations.

    • Homework Set 9: due 11:59PM Saturday 11/20
      Objectives: More review on the materials in the first half of the semester
      • [80 pts] Additional problems on HW1-HW7 materials
      • [20 pts] A39: Vos in diff amp. Problem A38 was given in Homework Set 6 .

    • Homework Set 8: due 10:00AM Friday 10/27
      Objectives: Bias circuits and bandgap reference
      • [40 pts] Problem 2 of the sample midterm exam 1
      • [20 pts] Problem bandgap-1
      • [40 pts] Problem D2 - Bandgap reference design
      • [20 pts] Problem D2 - Extra credit

    • Homework Set 7: due 11:59PM Saturday 10/21
      Objectives: Amplifier calculations and simulation

    • Homework Set 6: due 11:59PM Sunday 10/15
      Objectives: More on DC bias, operating region, output resistance, 2-stage amplifier
      • [10 pts] Problem A38
      • [10 pts] Problem A28.1
      • [20 pts] Problem A28.2
      • [30 pts] Problem A40b
      • [30 pts] Problem 1 of the sample midterm exam 1

    • Homework Set 5: due 2:00PM Friday 10/06
      Objectives: DC bias, operation regions, amplifier design and current mirror
      • [35 pts] Problem A5
      • [30 pts] Problem A6
      • [35 pts] Problem A19

    • Homework Set 4: due 2:00PM Friday 09/29
      Objectives: DC analysis of CMOS and BiCMOS circuits [100 pts]
      Note:
      • Assume familiarity with basic large-signal characteristics of bipolar junction and MOS transistors.
      • CMOS means "complementary metal-oxide-semiconductor" process. BiCMOS refers to a process where both CMOS and bipolar junction transistors are available.
      • Gamma is approximately zero means that the MOS threshold voltages can be considered constant so that basic equations reviewed in class for MOS transistors apply.

    • Homework Set 3: due 2:00PM Friday 09/22
      Objectives: DC and Small-Signal analysis of Common-Source amplifier circuits
      Note:
      • 25 points for each problem.

    • Homework Set 2: due 2:00PM Friday 09/15
      Topics:
      • [40 pts] Problem O.3 (NMOS precision current reference: tolerances and temperature drift)
      • [15 pts] Problem O.6 (Op-amp imperfections: input offset voltage and CMRR)
      • [25 pts] Problem O.8 (NMOS reference current source)
      • [20 pts] Problem O.9 (Op-amp imperfections: power supply rejection ratio PSRR)
      Note:
      • Assume background on basic large-signal characteristics of BJT and MOS transistors.
      • If you need to refresh your background in introductory microelectronics, the Lecture page will include links to supplementary notes and pointers to textbook references.

    • Homework Set 1: due 12:00PM Sunday 09/10
      Objectives:
      • Analyze op-amp imperfection
      • Get started with using LTspice for circuit simulations
        • LTspice hotkeys and commands
        • Basic familiarity with Spice simulations is assumed. If you have not used LTspice before, you are expected to look through LTspice documentation, on-line resources, or built-in Help to figure out how to work with the schematic editor, simulation options, and the waveform viewer.
      • Download


      HW/Report Submission to D2L / Assessments / Dropbox

      • You can make your HW on your personal computer.
      • File type: A single, easily readable PDF file containing all work and all relevant results. Only the contents of this file will be graded.
      • File name: hw#.your_name.pdf
      • Keep a copy: in your local computer HW folder, and do not modify after submission.
      • Upload: the final version to D2L / Assessments / Dropbox
      • Late submission can be accepted with 33%/day penalty