In this class, the students are expected to be trained to:
- Analyze/build complex CMOS analog circuits from managing individual transistors
- Acquire intuition to inspect circuit operations
- Calculate large signal DC bias conditions and small signal characteristics of various analog building blocks and modules, including amplifiers and linear regulator
- Learn and practice more advanced analog circuit design skills with feedback and frequency response
- Gain preliminary design experience to prepare required knowledge for other professional IC design class such as ECEN 5837 - Mixed-Signal IC Design and ECEN 5847 - Integrated Circuits and Devices for Power Management ICs
M,W,F 3:00PM - 3:50PM, ECCS 1B14
Class video captures will be posted on D2L Mediasite Lecture Access.
Course home page
It is the student's responsibility to check the course website often for updates to schedule, notes, assignments, due dates, etc.
Lecture notes and supplementary materials are provided on the course website. No textbook is required. The following are recommended reference textbooks:
- [Gray] P. Gray, P. Hurst, S. Lewis, R. Meyer, "Analysis and Design of Analog Integrated Circuits,"
5th Edition,WILEY, 2009. This textbook is on reserve in the Engineering Library.
- [Razavi] B. Razavi, "Design of Analog CMOS Integrated Circuits” McGraw-Hill Education, 2011.
- [Allen] P. Allen, D. Holberg, "CMOS Analog Circuit Design, Second Edition," Oxford, 2002. An on-line version of this textbook is available from CU network. Off-campus students need to use CU VPN to access the CU on-line resources.
- [Johns] D. Johns, K. Martin, "Analog Integrated Circuit Design," Wiley, 1997.
- [Sedra] Sedra, Smith, "Microelectronics Circuits," Oxford. This textbook is used in ECEN3250.
Prof. Hanh-Phuc Le
Office telephone: (303) 735-9685
Office hour: Mon,Wed 5PM-6PM @ ECOT 340
(Other office hour available on request)
LTspice IV is required. This is a free and unrestricted Spice simulator provided by and supported by Linear Technology. LTspice is also available in the
circuits (ECEE 281) and power (ECEE 1B65) labs
Grading and required work
- All work must be submitted on D2L.
- HW assignments (total): 40%
- Midterm exam: 25%
- Final exam: 35%
- Extra-credit assignments are optional and granted case-by-case dependent on significant contribution to the class or assignments.
- Homeworks: late work can be accepted with 33%/day penalty
- Exams: no make-up or early exams, no late work will be accepted (except in cases of documented emergencies)
- The same deadlines apply to both on-campus and off-campus students
- All Honor Code applies to all students
- Zero tolerance for cheating. At any level and in any form cheating will result in automatic failing grade F for all parties
involved (giving and receiving), and will be reported to the CU Boulder Honor Code Council.
- Homework: you are encouraged to collaborate with other students taking the course in
this semester. However, each student must complete and turn in their own work. Copying someone else's work in
any form, or collaborating in any form with anyone not taking the course in this semester is not allowed.
- Exams: no collaboration of any kind is allowed, strictly follow the exam directions, no time extension
- See the additional notices below, which generally apply to all CU students in all courses
- If you qualify for accommodations because of a disability, please submit
to me a letter from Disability Services in a timely manner so that your
needs may be addressed. Disability Services determines accommodations based
on documented disabilities.
- Every effort will be made to reasonably and fairly deal with students who
have serious religious observances that conflict with scheduled exams,
assignments, etc, accouding the the CU Boulder campus policy. Please notify the instructor well in advance, so that
there is time to make adequate arrangements.
- All students of the University of Colorado at Boulder are responsible for
knowing and adhering to the academic integrity policy of this institution.
Violations of this policy may include: cheating, plagiarism, aid of academic
dishonesty, fabrication, lying, bribery, and threatening behavior. All
incidents of academic misconduct shall be reported to the Honor Code Council
(email@example.com). Students who are found to be in
violation of the academic integrity policy will be subject to both academic
sanctions from the faculty member and non-academic sanctions (including but
not limited to university probation, suspension, or expulsion).
- The University of Colorado policy on Sexual Harassment and the University of
Colorado policy on Amorous Relationships applies to all students, staff and
faculty. Any student, staff or faculty member who believes s/he has been the
subject of discrimination or harassment based upon race, color, national
origin, sex, age, disability, religion, sexual orientation, or veteran
status should contact the Office of Discrimination and Harassment (ODH) at
about the ODH and the campus resources available to assist individuals
regarding discrimination or harassment can be obtained here.
ECEN4827/5827 Syllabus / Course Outline
- Op-amp application circuits and op-amp characteristics
- Transistor-level view of a two-stage op-amp
- Review of CMOS process technology and device characteristics
-- processing, large-signal device equations, operating modes
- Review of DC bias solution principles using the two-stage op-amp as
- Review of the device small-signal models using the two-stage op-amp
as an example
-- basic gain stages: common-source, common-drain stages
-- differential amplifier, active loading, half-circuit analysis, CMRR
-- body effect
- Basic principles of analog IC design
-- Process and temperature variations
- Introduction to negative feedback circuits
- Reference circuits and voltage regulators
- Current and voltage references
- Temperature and power supply sensitivity
- Bandgap reference
- Design of linear voltage regulators
- Device high-frequency small-signal models & capacitances
- Simplified BW and high-frequency analysis
-- Zero-valued time constant (ZVTC) method for BW estimation
-- n-extra element theorem (n-EET) for high frequency dynamics
- BW limitations of basic gain stages: common-source and cascode
- Slew-rate and BW limitations of op-amps
- Frequency-response and stability of feedback circuits
- Phase and gain margins
- Frequency compensation techniques
- Examples of analysis and design of more advanced analog building blocks
- Op-amp design procedures
- Fully differential amplifiers
- Design of PWM controllers for swtiched-mode power converters