Change Log
Software
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ECEN 5837 (Mixed-Signal IC Design)
3/2/06:
Added synthesis tutorial for RC5.2, Encounter RTL Compiler, and added RC5.2 user and command references (PDF)
Added import tutorials for synthesized Verilog and layout
Added First Encounter place & route tutorial
2/13/06:
Added instructions on
creating a symbolic link
to scratch for the simulation files.
2/7/06:
Added
Monte Carlo analysis tutorial
1/23/06:
Updated Hierarchy Editor tutorial to include simulation of extracted view (in step 5)
Updated AMS documents to include Assura guides
1/20/06:
'Change Log' Created
Part III: Layout and Verification
updated: Changed from Diva to Assura