Change Log
Software | ECEN 5837 (Mixed-Signal IC Design)

3/2/06:

  1. Added synthesis tutorial for RC5.2, Encounter RTL Compiler, and added RC5.2 user and command references (PDF)
  2. Added import tutorials for synthesized Verilog and layout
  3. Added First Encounter place & route tutorial

2/13/06:

  1. Added instructions on creating a symbolic link to scratch for the simulation files.

2/7/06:

  1. Added Monte Carlo analysis tutorial

1/23/06:

  1. Updated Hierarchy Editor tutorial to include simulation of extracted view (in step 5)
  2. Updated AMS documents to include Assura guides

1/20/06:

  1. 'Change Log' Created
  2. Part III: Layout and Verification updated: Changed from Diva to Assura