Chaining Interrupt Service Routine- A chaining ISR is an ISR which calls more than one handler for the very same interrupt source and priority - a technique often used in software when a hardware interrupt line is shared by multiple devices. (Note that most chaining ISRs also perform ISR polling).
Check-Stop - When an error condition on a CPU that can not be handled and further execution by the CPU is considered either dangerous or impossible, then the CPU hardware may enter a state known as check-stop where it ceases to fetch and execute instructions and can only leave this state via a reset - e.g. a detectable memory error that can not be corrected normally causes the CPU to enter check-stop.
Circuit Swtiched I/O - an I/O channel that is dedicated to one and only one data source and sink - often the channel may be point-to-point, but may be switched before the circuit is established.
Cirrus Crystal 4281 - an audio encoder/decoder used in ECEN 4623/5623.