L1 Cache - Level 1 Cache, a high-speed memory integrated on-chip with a CPU core - on the same ASIC for data access that can most often be completed in a single clock.
L2 Cache - Level 2 Cache, a high speed memory off-chip which can be accessed in several clocks.
Latch-Up - a non recoverable bit error due to permanent transistor logic damage to a memory device or register.
Latency - delay in an operation or process due to physical limitations such as electronic propagation delay, the speed of light, the number of clock cycles required to execute instructions, or time to modify a physical memory device.
Laxity - Laxity = (Time-to-Deadline - Time-to-Completion), but the time to the completion of a service can be difficult to determine, so most often an estimate of the Time-to-Completion is used which is derived from (WCET - Computation-Time-So-Far).
Layered Driver - a layered driver includes a Top Half and Bottom Half - the Top Half provides an interface to application code wishing to use a hardware resource and the Bottom Half provides an interface to a hardware device.