Table of Contents
VERILOG ObjectGEODE
Use-cases Analysis
Section: Use-cases Analysis
Two types of diagrams
Modeling principles
Section: Use-cases Analysis
Structured Use-cases
Organizing Use-cases with ObjectGEODE
Using operators
Operators
Parallel
Sequence
Choice
Repeat
Exception
Temporal structure
Coverage of the behavior
Global behavior of the system
Section: Use-cases Analysis
Basic MSC
Typical example of basic MSC
MSC instance
Arrow (message)
Architectural Design
Section: Architectural Design
Target: Reactive, discrete systems
SDL is an international standard
Two standardized representations for SDL descriptions
SDL and MSC diagrams
Basic SDL semantics
Section: Architectural Design
Available constructs
Graphic representation and textual equivalent
System hierarchy
Signals
Signal list
Block interconnection
Process interconnection
Connection between hierarchical levels
Process: Concurrent object
Dynamic replication of processes
Explicit / Implicit communication
Section: Architectural Design
SDL and MSC
Design of test cases with MSC
Action
Coregion
Creation and termination of a process instance
Timer
Refinement of MSC according to the SDL hierarchy
Behavioral Design
Section: Behavioral Design
Basic principles
Advantages of using “informal” SDL
Section: Behavioral Design
SDL finite state machine: Set of transitions
Extended finite state machine with variables and decisions
Available SDL elements for behavioral design
Typical description of a process
Start: Initialization transition
State: Initial state of a transition
Nextstate: Arrival state
Stop
Input
Input
Input
Equivalent notations
Priority input
Save
Save: Example
Output
Signal parameters
Informal task
Informal decision
Labels and branches
Dynamic creation of process instance
Time management
Time management
Use of timer
Declaration and use of procedure within a process
Definition of a procedure
Service
Service: Example
Process identification
PId: Predefined variables
PId: Example
Detailed Design
Section: Detailed Design
Hierarchical visibility of declarations
Data manipulation
Data manipulation
Variable declaration
Provided SDL constructions for defining types
Predefined types
Operators on predefined types
Syntype
Literals
Array generator
String generator
Powerset generator
Definition of record
Records including records
Use of a record
Abstract Data Type (ADT)
ADT’s purposes
Complete definition of an ADT
Example of ADT
Operators description
Enumerative form of an operator
Formula-like form of an operator
Algorithmic form of an operator (Textual or Graphical in ‘92, ‘96)
Undefined operators
Shared variables
Remote variables
Validation condition
Continuous signal
Continuous signal
Formal task
Decision
Comments
Text extension (obsolete)
Conclusion
Section: Conclusion
SDL 92: Object extensions
Package
Definition and use of packages
Package example
Structural types and instances
Use of structural types
Example of instantiation
Multiple instantiations of block
Generic Types
Inheritance
Generic Types with context parameters
Other SDL 92 communication means
Destination process in SDL 92
Remote variables
Remote procedure call
ANY decision
Section: Conclusion
SDL/MSC reference mechanism
Organization of the teams in the detailed design phase
Multi-user support
Nature of files
Environment
Section: Conclusion
Verification
Validation
Section: Conclusion
Application building
Application partitioning
SDL code generation
Run-Time Model
DesignTracer
Section: Conclusion
Reuse of external elements
Reuse of concurrent objects
Reuse of passive objects
Section: Conclusion
SDL96
MSC96
ASN.1 integrated in SDL: Z105
Z105: Objectives
Reasons to use ASN.1
TTCN
Section: Conclusion
Reference documents
Books
Exercises
Exercise 1 - State Machine
Exercise 2 - More State Machines
Exercise 3 - Museum (1)
Exercise 3 - Museum (2)
Quick reference
|