ECEN 4827 or 5827: Analog IC Design or equivalent (see instructor)
Familiarity with digital design in Verilog -- make up if necessary by reading suggested
Verilog text, Part I. Additional useful ref: Coding Styles That Kill!
Familiarity with UNIX operating systems (using Sun SOLARIS OS in SIMLAB) -- search getting started
tutorials on google if necessary.
Grading and required work
7 homework assignments worth 5% each: 35% total
Final project (65% total):
Project proposal & report: 20%
Final review and report: 45%
Late assignments and milestones: less than one week late will be docked 50%. No assignments will be accepted more than one week late. All assignments are due at the BEGINNING of lecture on the published due date.
Zero tolerance for cheating: at any level will result in automatic F for all parties
Homework: Students may discuss homework problems and give hints on design and simulation challenges.
However, each student must complete and turn in their own unique designs. Absolutely no copying of
design or layout files on magellan accounts is allowed. All students must maintain unique design files
in their home directory on magellan throughout the course (available for review by instructor upon request).
Final Project: Final projects are individual (not team based) unless specifically approved
by the instructor.
Fundamentals of analog IC design, beginning with basic amplifier building blocks
and continuing through complex operational amplifier design and compensation.
Mixed-Signal IC Design ECEN 5837 -- Spring Semesters
Continuation of Analog IC Design into core building blocks for mixed-signal designs, including
comparators and data converters. Primary focus on complete IC design process, system level design
methodologies and integration of analog and digital circuitry in simulation and layout.