ECEN 1400 - Introduction to Digital and Analog Electronics

Peter Mathys, Spring 2014


Lab 8: 2-Digit Counters

Quick Links


Goals of this Lab


This lab is a group activity. The current group assignments are given here. One lab report per group needs to be turned in on D2L. The responsibilites for the successful completion of the lab consist of three parts: The prelab, the actual lab measurements, and the writing of the report. The report will be graded according to three criteria: Correctness, completion, and clarity. On the cover page you must clearly state the student ID (SID) of the group member who had the main responsibility for the prelab, the SID of the group member who had the main responsibility for the lab measurements, and the SID of the group member who had the main responsibility for the report writing. Do not put your names on the report, only the student IDs so that there is some degree of anonymity for peer grading. Note that all group members need to be knowledgeable about all three parts, but each member has a specific role in the group. The responsibilities must be rotated for different labs so that each group member experiences all three roles.

Prelab

In digital logic a counter is a device that stores a number using a digital representation and then increments or decrements that number by a specific amount when a clock pulse is applied. Binary counters typically use flip-flops, e.g., 4 or 8, as the fundamental memory elements. A flip-flop can store one bit, either with a value of 0 or with a value of 1. In the simplest case of a positive edge-triggered binary up-counter a value of 1 is added to the least significant bit (LSB) every time a 0 to 1 transition is applied to the clock input of the counter. If the LSB is already one then the result is 1+1=0, plus a carry that is added to the nextmost significant bit. If that bit is also one already, it is flipped to zero and another carry is generated for the next bit, etc. Besides counting up by one, other features that counter circuits may have are a reset input to clear the counter (i.e., set to the all-zero value), load inputs to preset the counter to a specific value, enable/disable inputs to disable the counting of some clock pulses, and a ripple carry or terminal count output that can be used for cascading several counters such that larger numbers can be handled. Depending on the type of counter, reset and load may occur synchronously (i.e., in synchronism with the clock) or asynchronously (i.e., independent of the clock transitions).

P1. The 74AC161 Counter. In this lab we are using the 74AC161 counter circuit. This is a 4-bit binary synchronous counter with asynchronous reset and synchronous load. The schematic below shows a circuit for testing the features of the 74HC161 counter (which we use in Multisim since the 74AC161 is not available there).

74HC161 Test Circuit

The 74HC161 (as well as the 74AC161) counts on the positive edge of the clock (i.e., when the clock goes from 0 to 1). It turns out that the model of the counter that comes with Multisim erroneously counts on the negative edge clock, so you should use the corrected model in this file. Also note the use of the green four bar LED display. Do not use the corresponding red four bar LED display which has an error (the third bar does not work).

Use the truth table and the timing diagram in the 74AC161 datasheet together with the above circuit to test your understanding of the different features of the 74AC161 counter. In particular, check that you can count from 0000 all the way to 1111. Observe the function of the RCO output with the help of LED2. Test the reset function and test the ENP and the ENT inputs of the counter. What is the function of these inputs? What is the difference between ENP and ENT? Test the Load function of the counter, e.g., to preset the counter to 0001 or 1011. How are the Load and the CLK inputs related?

P2. Working with Two (or More) Counters. When you work with a larger design in Multisim it is not convenient to keep the whole circuit on one page. This is especially true if you need to use the same subcircuit, such as a BCD to seven segment decoder, several times in a design. One way to break up a large design into smaller units is to use a hierarchy of interconnected circuits. As an example, let's look at the design of a 2-digit counter with 7-segment displays. For the 7-segment displays a decoder and current-limiting resistors are needed. This can be combined into a subcircuit that looks as follows.

Outline of decoder subcircuit in Multisim

The bold black lines are bus wires, i.e., the combination of several wires into one bus. To place a bus select the "Place Bus" tool. Then click on the schematic where the bus should start. Route the bus to the places in the schematic where you want to connect wires. Double-click to mark the end of the bus. To add lines to the bus, right-click on the bus and select "Properties". Click on the "Bus Lines" tab and then use the "Add..." button to add lines to the bus. This is shown in the next figure.

Bus Lines of BUS2 in decoder subcircuit

To connect a wire to the bus, start a wire at some component and then place the endpoint at the bus. A dialog box will pop up where you can either select an existing Bus Line or create a new one. To place a connector on the schematic, click on "Place", then "Connectors" and then select either "HB/SC Connector" for a single wire or "Bus HB/SC Connector" for a bus. Then wire the connector to the circuit.

Place a HB/SC connector

The completed decoder subcircuit, called Decoder_001, with the HB/SC connectors in place is shown below (click to enlarge).

Completed decoder subcircuit in Multisim

Now start a new design and place two counters (remember to use the corrected version of the 74HC161, available in this file), two 7-segment displays (the animated ones), resistors, and switches as shown below.

2-digit counter components, without decoder

Now we need to put two of the decoder circuits that we made previously in Decoder_001 between the counters and the 7-segment displays. Start by clicking on "Place" and the select "Hierarchical Block from File..." as shown next.

2-digit counter, place HB menu option

In the window that opens select Decoder_001.ms11 as the hierarchical block to use.

2-digit counter, select hierarchical block

Place two of the decoders as hierarchical blocks in the schematic as shown here.

2-digit counter components, with decoder blocks

Interconnect the blocks as shown in the completed 2-digit counter schematic below (click to enlarge).

Two-digit 74HC161 counter with seven segment displays in Multisim

Test the 2-digit counter for correct operation. Operate the clock switch and check that the count changes on the positive edge of the clock. Check that after 16 clock cycles the most significant digit (the one on the right) changes to 1 and after another 16 clock cycles to 2, etc. Also test that you can load each of the counters to zero from an arbitrary number. Another thing to check is that the enable/disable switch works to stop the counting when it is closed.

P3. Designs for Specific Counting Sequences. The overall goal here is to design a counter circuit with two 74AC161 counters and at most two 74AC00 Quad NAND gates (at most 8 NAND gates total) that counts from 1 to 12 as shown in this video.

To help you get started, here is an example of a 2-digit counter where the least significant digit (the one on the left) counts modulo 10, i.e., it counts 0,1,2,...,8,9,0,1,2,... (click on the image to enlarge).

Two-digit 74HC161 counter with modulo-10 counting for the left digit

Show how to modify this to obtain a 2-digit counter that counts modulo 60, i.e., it counts 0,1,2,...,58,59,0,1,2,..., so that it could be used to count minutes or seconds in a digital clock.

Now tackle the problem of designing a 2-digit counter that counts 1,2,3,...,9,10,11,12,1,2,3,... .


Lab Experiments

E1. There is no experiment E1.

E2. There is no experiment E2.

E3. Implementation of the Hours Counter. Build the hours counter, counting 1,2,..,9,10,11,12,1,2,.. as shown in this video that you designed in problem P3 on a universal printed circuit board. Use the display board from last week to display the hours digits and the decimal point of the 7-segment display to display the tens of the hours (either on or off for 0 or 1). Include the schematic of your design in the lab report and assess how well your design is working in practice.

Note: Even though not shown explicitly in the schematics, do not forget to power the logic circuits and to use 0.1uF bypass capacitors near the power supply pins (use about one bypass capacitor for every 2-3 integrated circuits). Here are links for the datasheets of the integrated circuits (for pin assignments, etc.): 74AC00 and 74AC161.