ECEN 1400 - Introduction to Digital and Analog Electronics

Peter Mathys, Spring 2014


Lab 9: Clock Generator and Switch Debouncing

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Goals of this Lab


This lab is a group activity. The current group assignments are given here. One lab report per group needs to be turned in on D2L. The responsibilites for the successful completion of the lab consist of three parts: The prelab, the actual lab measurements, and the writing of the report. The report will be graded according to three criteria: Correctness, completion, and clarity. On the cover page you must clearly state the student ID (SID) of the group member who had the main responsibility for the prelab, the SID of the group member who had the main responsibility for the lab measurements, and the SID of the group member who had the main responsibility for the report writing. Do not put your names on the report, only the student IDs so that there is some degree of anonymity for peer grading. Note that all group members need to be knowledgeable about all three parts, but each member has a specific role in the group. The responsibilities must be rotated for different labs so that each group member experiences all three roles.

Prelab

An essential feature of a digital clock is that it keeps track of time, e.g., by counting time in 1 second increments. One way to generate precise 1 sec intervals is to use an oscillator with a quartz crystal resonator at a frequency that is a power of 2, e.g., 32.768 kHz. In this way a chain of flip-flops, each dividing its input frequency by 2, can be used to derive an accurate 1 Hz clock signal. Another important feature of a clock is a method by which the current time can be set initially. Such a method consists typically of switch that selects between run mode and set mode and two more switches that are used to advance the minutes and the hours, respectively. One problem with (mechanical) switches is that the contacts bounce, thereby producing an oscillating signal during the transition from off to on state and vice versa. To obtain a clean transition between on and off states some form of debouncing is needed.

P1. Crystal-Controlled Clock Generator. The following schematic shows how to use a CD4060BC integrated circuit and a 74AC74 integrated circuit to generate a 1 Hz clock signal from a 32.768 kHz quartz crystal.

Crystal-controlled 1 Hz clock generator

This circuit will not work in Multisim because the 4060 integrated circuit is simulated in Multisim using a purely digital model and the quartz crystal oscillator would require an analog simulation model. There is also the issue that the simulation would be way too slow because if it is not done in real time. Thus, you need to find out how the circuit works from the CD4060BC and the 74AC74 datasheets. In particular determine the frequencies that you would expect to see at pins 7, 14, 1, and 3 of the 4060 integrated circuit. Using the output from pin 3 as clock input for the 74AC74 integrated circuit (74HC74 in Multisim), draw a timing diagram for Q and not{Q} (pins 5 and 6) of the 74AC74. What is the Clock Output frequency of the overall clock generator. What does the Clock Output waveform look like?

P2. Switch Debouncing. The simple circuit that we have been using for generating "low" and "high" inputs for testing digital circuits looks like this.

Simple circuit to create low and high signal from a SPST switch

Mechanical switches, like the tactile switch shown below, do not act exactly like their idealized counterparts in Multisim (click on image to enlarge).

Tactile pushbutton switch

When this button is pushed (closing a connection to ground) and then released (with a 10 kohm pullup resistor to Vcc), it produces a waveform like the one shown below.

On-Off waveform produced by tactile switch

The switch is a mechanical device which closes and opens by pressing two (or more) pieces of metal together and then releasing them. In this process some bouncing of the mechanical parts occurs and that is what causes the intermittent waveform shown above.

To smooth out the switch bouncing waveform an RC lowpass filter can be used as shown below.

Using a capacitor for simple switch debouncing

What is the time constant of the RC circuit? How does the time constant compare to the timescale of the bouncing waveform shown above? Sketch and label the voltage waveform across the capacitor assuming an ideal rectangular shaped input from the switch. If the "debounced" output from the above circuit is used as the clock input of a 74AC161 counter a new problem arises, namely the voltage does not rise quickly enough. Check the 74AC161 datasheet to find out what the minimum steepness (in volts/ns) of the input waveform has to be for correct operation at Vcc = 5.5 V. How does this steepness value compare to the steepness of the voltage across the debouncing capacitor?

Luckily there is a fairly simple solution to fix the problem with the slow rising voltage across the debouncing capacitor. It comes in the form of the 74AC14 hex inverter with Schmitt trigger input. This is shown in the following schematic. Note capacitor C4 that is used as bypass capacitor across the power supply and needs to be mounted close to the Schmitt trigger inverter integrated circuit.

Using a capacitor and a Schmitt trigger inverter for switch debouncing

Use resources on the Internet to find out what a Schmitt trigger is and include the results in your lab report.

Next, use the following schematic to test and analyze the switch debouncing circuit. In particular, look at the voltage waveforms across the capacitor and at the output of the Schmitt trigger inverter.

Setup for testing switch debouncing

If you can use a SPDT (single pole, double throw) switch instead of a SPST (single pole, single throw) switch (as in the schematic above), then a debounced output Q (and not{Q}) can be obtained using a SR latch as shown below.

Switch debouncing using a SPDT switch and a SR latch

Try this circuit in Multisim and explain why the Q and not{Q} outputs are debounced. Hint: Try the circuit below with two independent switches so that you can simulate bouncing by opening and closing one of the switches while leaving the other one open.

Test of switch debouncing with SR latch using two independent switches

P3. Clock Generator with Run-Set-Advance Feature. The next schematic shows the complete clock generator circuit. Switches J1 and J2 (only one of the two is closed at any given time instant) are used to select "Run" and "Set" mode, respectively.

Schematic of clock generator with Run-Set-Advance feature

In "Run" mode the Clock Output signal is a 50% duty cycle rectangular waveform with frequency 1 Hz. In "Set" mode the Clock Output signal consists of single pulses that are generated manually when switch J3 ("Advance") is closed and opened again.

Test this circuit in Multisim using a 74AC161 (74HC161 in Multisim) counter with decoder and (animated) 7-segment display as shown in the following schematic. Remember to use the corrected version of the 74HC161 counter in this file.

Test of clock generator with Run-Set-Advance feature

Analyze the different parts of this circuit. In particular, determine what the function of U4A, U4B, U4C is (consider making a truth table). What is the function of U3A and U3B? Hint: Find out at which times (with respect to the 1 Hz clock) it is possible to switch between the "Run" and the "Set" mode. Could switching between "Run" and "Set" mode cause a clock transition (that is counted by the 74AC161 counter) if it is done at the wrong time?


Lab Experiments

E1. Crystal-Controlled Clock Generator. Build the crystal controlled clock generator whose schematic is shown below on the universal printed circuit board.

Crystal-controlled 1 Hz clock generator

Use a 16-pin socket for the CD4060BC integrated circuit and a 14-pin socket for the 74AC74 integrated circuit. Keep all connections between the CD4060BC integrated circuit and the discrete components (15 megohm and 330 kilohm resistors, two capacitors and quartz crystals) short.

Measure the frequencies at pins 7, 14, 1, and 3 of the CD4060BC integrated circuit and at pin 5 of the 74AC74 integrated circuit. Compare the values with the ones that you found in problem P1. Display the waveform of the clock on pin 5 of the 74AC74. Then use this clock to drive the 74AC161 counters with the 7-segment display and decoder that you built in previous labs. Verify that the counter counts 1,2,3,... in 1 second intervals.

E2. Switch Debouncing. The goal of this experiment is to find out how switch bouncing affects counting when the switch output in processed or unprocessed form is used as the clock signal for a 74AC161 counter. To start, use one of the pushbutton switches and build the circuit shown below on your breadboard.

Simple circuit to create low and high signal from a SPST switch

Use the Switch Output as the clock input for the board with the 74AC161 counters (with the 4-bit output connected to the 7-segment decoder/display board). Observe the following and include it in your lab report: (i) Is the counter counting, (ii) if it is counting, is the counting sequence incrementing by exactly 1 each time you push and release the switch button?

Repeat the above observations with the circuit that uses an RC LPF to smooth out the switch bouncing, as shown below.

Using a capacitor for simple switch debouncing

Repeat the observations with the circuit that includes the RC LPF and the Schmitt trigger inverter, as shown next.

Using a capacitor and a Schmitt trigger inverter for switch debouncing

Another variant of switch debouncing that you studied in problem P2 is the SR latch circuit shown below which uses two switches and no capacitor (except for power supply bypass capacitors).

Switch debouncing using a set and reset switch and a SR latch

Build this circuit on your breadboard and make the same observations as for the single switch circuit. Connect the clock of the 74AC161 counter to the Q output. Then push and release the Reset (R) button, followed by pushing and releasing the Set (S) button. The counter should increase the count by 1 in response to this sequence. What happens if you hold down the Reset button while you push and release the Set button? Explain your observations.

E3. Clock Generator with Run-Set-Advance Feature. Build the following circuit on a universal printed circuit board. Since not all components will fit on the board, implement the switches and the associated logic circuits (U5 74AC14 and U3 74AC00) on the breadboard (click to enlarge). Use pushbutton switches for J1, J2, and J3. Also, don't forget to power the integrated circuits and to include at least two power supply bypass capacitors of 0.1uF, one of which should be mounted close to the 74AC14 circuit.

Schematic of clock generator with Run-Set-Advance feature

Use the board with the 74AC161 counters and the board with the 7-segment display and decoder to test the clock generator circuit. In particular you sould be able to count time in 1 second intervals when the circuit is in "Run" mode and you should be able to increment the count by exactly one every time the "Advance" button is pushed in "Set" mode.