Li Shang

Assistant Professor

Ph.D. Princeton University

Dissertation "System-level Power Analysis and Optimization"

Research Interests

  • High-performance Computer architecture

  • Mobile Computing

  • Design for Nanotechnologies

  • Power/thermal analysis and optimization

  • Embedded system design and synthesis

  • Computer-aided design

Graduate Students

  • Nicholas Allec
  • Assem Bsoul
  • Dan Fay
  • Hansu Gu
  • Zyad Hassan
  • Kun Li
  • Zheng Li
  • Moustafa Mohamed
  • Jie Wu
  • Changyun Zhu

Professional Activities

Project Release

Publications (Google scholar citations)

2009

  • [CASES] D. Fay, L. Shang, and D. Grunwald, "A platform for developing adaptable multicore applications," in Proc. IEEE International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, July 2009.

  • [DAC] L. Zheng, D. Fay, A. Mickelson, L. Shang, M. Vachharajani, D. Filipovic, W. Park, and Y. Sun, "Spectrum: A hybrid nanophotonic-electric on-chip network," in Proc. IEEE Design Automation Conference, July 2009.

  • [DAC] Y. Lu, L. Shang, H. Zhou, and X. Zeng, "Statistical reliability analysis under process variation and aging effects," in Proc. IEEE Design Automation Conference, July 2009.

  • [DAC] Y. Lu, H. Zhou, L. Shang, X. Zeng, "Multicore parallel min-cost flow algorithm for CAD applications," in Proc. IEEE Design Automation Conference, July 2009.

  • [DAC] L. Zhang, L. Bai, R. Dick, L. Shang, R. Joseph, "Process variation characterization of chip-level multiprocessors," in Proc. IEEE Design Automation Conference, July 2009.

  • [ISLPED] L. Zheng, A. Mickelson, L. Shang, M. Vachharajani, D. Filipovic, W. Park, and Y. Sun, "Spectra: A high-performance low-power nanophotonic on-chip network," in Proc. ACM Int. Sym. Low Power Electronics and Design, Aug. 2009.

  • [MobiSys] C. Zhu, K. Li, Q. Lv, L. Shang, and R. Dick, "iScope: Personalized multi-modality image search for mobile devices," in Proc. ACM Int. Conference on Mobile Systems, Applications, and Services, June 2009.

  • [JETC] W. Zhang, N. Jha, and L. Shang, "A hybrid Nano/CMOS dynamically reconfigurable system -- part I: Architecture," ACM Journal on Emerging Technologies in Computing Systems, accepted for publication.

  • [JETC] W. Zhang, N. Jha, and L. Shang, "Design space exploration and data memory architecture design for a hybrid nano/CMOS dynamically reconfigurable architecture," ACM Journal on Emerging Technologies in Computing Systems, accepted for publication.

  • [TCAD] Z. Hassan, N. Allec, L. Shang, R. Dick, V. Venkatraman, and R. Yang, "ThermalScope: Multi-scale thermal analysis for nanometer-scale integrated circuits," IEEE Transactions on Computer-Aided Design, accepted for publication.

  • [TVLSI] X. Chen, L. Yang, R. Dick, L. Shang, H. Lekatsas, "C-Pack: A high-performance microprocessor cache compression algorithm," IEEE Transactions on Very Large Scale Integration Systems, accepted for publication.

  • [JETC] W. Zhang, L. Shang, and N. Jha, "A hybrid Nano/CMOS dynamically reconfigurable system -- part II: Design optimization flow," ACM Journal on Emerging Technologies in Computing Systems, accepted for publication.

  • [DATE] Z. Li, J. Wu, L. Shang, R. Dick, and Y. Sun, "Latency criticality aware on-chip communication," in Proc. IEEE Conference on Design, Automation, and Test in Europe, Mar. 2009.

2008

  • [TCAD] C. Zhu, Z. Gu, L. Shang, R. Dick, and R. Joseph, " Three-dimensional chip-multiprocessor run-time thermal management," IEEE Transactions on Computer-Aided Design, vol. 27, no.3, 2008.

  • [TVLSI] N. Allec, R. Nobel, L. Shang, and R. Dick, " An adaptive algorithm for single-electron device and circuit simulation," IEEE Transactions on Very Large Scale Integration Systems, accepted for publication.

  • [ICCAD] N. Allec, Z. Hassan, L. Shang, R. Dick, and R. Yang," Multi-scale thermal analysis for nanometer-scale integrated circuits," in Proc. IEEE/ACM International Conference on Computer-Aided Design,Nov. 2008. (Nominated for Best Paper Award) .

  • [ICCAD] D. Bild, Misra, Chantem, Kumar, R. Dick, S. Hu, and L. Shang," Temperature-aware test scheduling for multiprocessor system-on-chip," in Proc. IEEE/ACM International Conference on Computer-Aided Design,Nov. 2008.

  • [PACT] K. Meng, R. Joseph, L. Shang, R. Dick," Chip multi-processor global power management," in Proc. Parallel Architectures and Compilation Techniques, Oct. 2008.

  • [PACT] N. Eisley, L.-S. Peh, L. Shang," Leveraging on-chip networks for cache migration in chip multiprocessors," in Proc. Parallel Architectures and Compilation Techniques, Oct. 2008.

  • [Invited] C. Zhu, Z. Gu, L. Shang, R. Dick, and R. Josseph," Run-time thermal management of three-dimensional chip-multiprocessor," in Workshop on quality-aware design, held in conjunction with ISCA-35 Jun. 2008.

  • [WRAP] D. Fay, G. Schelle, L. Shang, and D. Grunwald," Modeling FPGA-based cyber-physical system," in Workshop on Architectural Research Prototyping, held in conjunction with ISCA-35 Jun. 2008.

  • [WRAP] G. Schelle, D. Fay, L. Shang, and D. Grunwald," Exploring varying level of hardware reliability in processor architectures," in Workshop on Architectural Research Prototyping, held in conjunction with ISCA-35 Jun. 2008.

  • [DATE] N. Allec, R. Knobel, and L. Shang," Adaptive simulation for single-electron device," in Proc. IEEE Conference on Design, Automation, and Test in Europe, Mar. 2008.

  • [DCC] X. Chen, L. Yang, H. Lekatsas, R. Dick, and L. Shang," Design and implementation of a high-performance microprocessor cache compression algorithm," in Proc. IEEE Data Compression Conference, Mar. 2008.

  • [TCCA] Z. Li, C. Zhu, L. Shang, R. Dick, and Y. Sun, " Transaction-aware network-on-chip resource reservation, " IEEE Computer Architecture Letters. vol. 99, no. 2, 2008.

  • [Nanotechnology] N. Allec, R. Knobel, and L. Shang," SEMSIM: Adaptive multiscale simulation for singe electron devices," IEEE Transactions on Nanotechnologies, vol. 7, no. 7, 2008.

  • [TVLSI] C. Zhu, Z. Gu, R. Dick, L. Shang, and R. Knobel, " Characterization of single-electron tunneling transistors for designing low-power embedded systems," IEEE Transactions on Very Large Scale Integration Systems, accepted for publication.

  • [Springer] L. Shang, R. Dick, and N. Jha," High-level synthesis algorithms for power and temperature minimization," High-level synthesis, Springer, 2008.

2007

  • [ICCAD] P. Zhou, Y. Ma, Z. Li, R. P. Dick, L. Shang, H. Zhou, X. Hong, and Q. Zhou, "3D-STAF: Scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits," in Proc. IEEE/ACM International Conference on Computer-Aided Design , Nov. 2007.

  • [CODES-ISSS] C. Zhu, Z. Gu, R. Dick, and L. Shang, "Reliable multiprocessor system-on-chip synthesis,," Proc. International Conference Hardware/Software Codesign and System Synthesis, Sep. 2007. (pdf)

  • [CODES-ISSS] S. Chong, L. Shang, and R. P. Dick, "Three-dimensional multi-processor system-on-chip thermal optimization," Proc. International Conference Hardware/Software Codesign and System Synthesis, Sep. 2007. (pdf)

  • [TVLSI] Z. Gu, C. Zhu, R. Dick, and L. Shang, "Application-specific MPSoC reliability optimization," IEEE Transactions on Very Large Scale Integration Systems , to appear.

  • [TCAD] A. Kumar, L. Shang, L.-S. Peh, and N. K. Jha, "System-level dynamic thermal management for high performance microprocessors," IEEE Transactions on Computer-Aided Design , to appear.

  • [MICRO] D. Brooks, R. Dick, R. Joseph, and L. Shang, "Power, thermal, and reliability modeling in nanometer-scale microprocessors, " IEEE Micro , 2007.

  • [DAC] C. Zhu, Z. Gu, L. Shang, R. P. Dick, and R. Knobel, "Towards an ultra-low-power architecture using single-electron tunneling transistors, " in Proc. IEEE Design Automation Conference, Jun. 2007. (Nominated for Best Paper Award) . (pdf)

  • [DAC] W. Zhang, L. Shang, and N. K. Jha, "NanoMap: An integrated design optimization flow for a hybrid Nanotube/CMOS dynamically reconfigurable architecture, " in Proc. IEEE Design Automation Conference, Jun. 2007 . (pdf)

  • [TCAD] L. Shang, R. P. Dick, and N. K. Jha, "SLOPES: Hardware-software co-synthesis of low power real-time distributed embedded systems with dynamically reconfigurable FPGAs", IEEE Transactions on Computer-Aided Design, Mar. 2007. (pdf)

  • [DATE] Y. Liu, R. P. Dick, L. Shang, and H. Yang, "Accurate temperature-dependent integrated circuit leakage power estimation is Easy, " in Proc. IEEE Conf. on Design, Automation, and Test in Europe, Mar. 2007. (pdf)

  • [ISQED] Y. Liu, H. Yang, R. P. Dick, H. Wang, and L. Shang, "Thermal vs. energy optimization for DVFS-enabled processors in embedded systems," in Proc. IEEE Proc. Int. Symp. Quality Electronic Design, Jan. 2007. (pdf)

  • [TCAD] Y. Yang, Z. P. Gu, C. Zhu, R. P. Dick, and L. Shang, "ISAC: Integrated Space and Time Adaptive Chip-Package Thermal Analysis," IEEE Transactions Computer-Aided Design, Jan. 2007. (pdf)

2006

  • [MICRO] N. Eisley, L.-S. Peh, and L. Shang, "In-network cache coherence ", in Proc. IEEE/ACM International Symposium on Microarchitecture, Dec. 2006. (pdf)

  • [ICCAD] Y. Yang, C. Zhu, Z. P. Gu, L. Shang, and R. P. Dick, "Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design", in Proc. IEEE/ACM International Conference on Computer-aided Design, Nov. 2006. (pdf)

  • [Potentials] L. Shang and R. P. Dick "Thermal Crisis: Challenges and Potental Solutions", IEEE Potentials,  Sept./Oct. 2006 (pdf)

  • [DAC] W. Zhang, N. K. Jha, and L. Shang, "NATURE: A Hybrid Nanotube/CMOS Dynamically Reconfigurable Architecture", in Proc. IEEE Design Automation Conference, Jul. 2006. (pdf)

  • [DAC] A. Kumar, L. Shang, L.-S. Peh, N. K. Jha, "HybDTM: A Coordinated Hardware-Software Approach for Dynamic Thermal Management", in Proc. IEEE Design Automation Conference, Jul. 2006. (pdf)

  • R. P. Dick, L. Shang, and N. K. Jha, "Power-Aware Architectural Synthesis", to appear in The VLSI Handbook, 2006.

  • [TCCA] N. Eisley, L.-S. Peh, and L. Shang, "In-network cache coherence", IEEE Computer Architecture Letters, vol 5, no. 1, 2006. (pdf)

  • [DATE] Y. Yang, Z. P. Gu, C. Zhu, L. Shang, and R. P. Dick, "Adaptive chip-package thermal analysis for synthesis and design," in Proc. IEEE Conf. on Design, Automation, and Test in Europe , Mar. 2006. (pdf)

  • [MICRO TOP PICK] L. Shang, L.-S. Peh, A. Kumar, and N. K. Jha, "Temperature-aware on-chip networks," IEEE Micro: Micro's Top Picks from Computer Architecture Conferences (IEEE Micro - top pick), Jan.-Feb.  2006. (pdf)

  • [ASPDAC] Z. P. Gu, Y. Yang, J. Wang, R. P. Dick, and L. Shang, "TAPHS: Thermal-aware unified physical-level and high-level synthesis," in Proc. IEEE Asia & South Pacific Design Automation Conf. , Jan. 2006. (Nominated for Best Paper Award) (pdf)

  • [TCAD] L. Shang, L.-S. Peh, and N. K. Jha, "PowerHerd: A distributed scheme for dynamic satisfying peak power constraints in interconnection networks," IEEE Transactions on Computer-Aided Design, Jan. 2006. (pdf)

2005

  • Good to enjoy my life for a year

2004

  • [TMC] L. Shang, R. P. Dick and N. K. Jha, "DESP: A distributed economics-based subcontracting protocol for computation distribution in power-aware mobile ad-hoc networks," IEEE Transactions on Mobile Computing, vol. 3, no. 1, Jan. 2004, pp. 33-45. (pdf)

  • [MICRO] L. Shang, L.-S. Peh, A Kumar and N. K. Jha, "Thermal modeling, characterization and management of on-chip networks," in Proc. IEEE/ACM International Symposium on Microarchitecture ,   Dec 2004. (pdf)

2003

  • [ICS] L. Shang, L.-S. Peh and N. K. Jha, "PowerHerd: Dynamic satisfaction of peak power constraints in interconnection networks," in Proc. ACM International Conference on Supercomputing, pp 98-108, June 2003. (pdf)

  • [GLVLSI] W. Wang, T. K. Tan, J. Luo, Y. Fei, L. Shang, K. S. Vallerio, L. Zhong, A. Raghunathan, and N. K. Jha, "A comprehensive high-level synthesis system for control-flow intensive behaviors," in Proc. ACM Great Lakes VLSI Symposium , pp. 11-14, Mar. 2003. (pdf)

  • [HPCA] L. Shang, L.-S. Peh and N. K. Jha, "Dynamic voltage scaling with links for power optimization of interconnection networks," in Proc. IEEE International Symposium on High-Performance Computer Architecture, pp. 79-90, Jan. 2003. (pdf)

2002

  • [PDCS] L. Shang, R. P. Dick, and N. K. Jha, "An economics-based power-aware protocol for computation distribution in mobile ad-hoc networks," in Proc. IASTED International Conference on Parallel and Distributed Computing and Systems, pp. 344-349, Nov. 2002. (Best Paper Award) (pdf)

  • [TCCA] L. Shang, L.-S. Peh and N. K. Jha, "Power-Efficient Interconnection Networks: Dynamic Voltage Scaling with Links," Computer Architecture Letters, vol 1, no. 2, May 2002, pp. 1-4. (pdf)

  • [FPGA] L. Shang, A. S. Kaviani, and K. Bathala "Dynamic power consumption in VirtexTM-II FPGA," in Proc. ACM International Symposium on Field-Programmable Gate Arrays , pp.157-164, Feb. 2002. (pdf)

  • [VLSI] L. Shang, and N. K. Jha "Hardware-software co-synthesis of low power real-time distributed embedded systems with dynamically reconfigurable FPGAs," in Proc. IEEE International Conference on VLSI Design, pp. 345-352, Jan. 2002. (pdf)

2001

  • [ICCD] L. Shang, and N. K. Jha "High-level power modeling of CPLDs and FPGAs," in Proc. IEEE International Conference on Computer Design, pp. 46-51, Sep. 2001. (pdf)

2000

  • L. Shang, Y.-Q. Ge, and R.-D. Zhou, "Embedded microprocessor IP design and analysis," Microelectronics, vol. 30, no. 1, Jan. 2000, pp. 28-30.

Contact Info.

     Engineering Center, ECEE197A 

     University of Colorado at Boulder

     425 UCB

     Boulder, CO 80309

     Phone:

     (303) 492-8785

     Email

     li.shang<at>colorado<dot>edu

Teaching

   874 High-performance on-chip systems

    451 Digital integrated circuit engineering

    ECEN 2120 Computers as components

    426 Real-time systems

The best way to predict the future is to invent it. -- Alan Kay, Xerox Palo Alto Research Center, 1971